Semiconductor fabrication technology has focused on obtaining highly integrated and lightweight semiconductor devices. The course of semiconductor package development has been changed from Dual-In-Line Package (DIP), Small-Out-Line (SO), Quad Flat Package (QEF) to Ball Grid Array (BGA) and Chip Size Package (CSP). In such progressed BGA and CSP packages, a solder ball is used instead of a lead in order to make a semiconductor package size as small as possible.
FIG. 1 is a view showing a method for manufacturing a semiconductor chip. When attaching a solder ball 2 to a semiconductor chip pad, the solder ball 2 is placed on an aluminum metal pad 1. Therefore, if excess pressure more than a standard strength is applied, a problem arises in that cracks occur on the chip pad. Such a crack, in turn, may generate an electrical short in the terminal.